Liquid crystal display panel, pixel structure and driving method thereof

ABSTRACT

The invention provides a pixel structure, including a plurality of pixel units; each pixel unit including: a first, second and third pixel areas, adjacently disposed. First pixel area includes first pixel electrode and first control switch. Second pixel area includes second pixel electrode and second control switch. Third pixel area includes third pixel electrode and third control switch. Third pixel electrode is connected to data signal sequentially through third and the second control switches. Third pixel electrode is connected to second pixel electrode through third control switch so as to make the voltage level at first pixel electrode different from voltage level at second pixel electrode when first control switch, second control switch and third control switch are all conductive.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to the field of liquid crystal displayingtechniques, and in particular to a liquid crystal display panel, pixelstructure and driving method thereof.

2. The Related Arts

When using multi-domain vertical alignment type liquid crystal displaypanel as a display panel of a liquid crystal display, because theorientations of the liquid crystal are different at differentobservation angles, the liquid crystal display panel may experiencecolor distortion when viewing at a large angle. To improve the colordistortion problems at large viewing angle, when a pixel structure isdesigned, a pixel (red, green or blue) is divided into two parts: thefirst pixel area and the second pixel area. The distortion at largeviewing angle is improved by controlling the voltage of two areas,generally known as low skew designs.

The low skew design is divided into mainly two categories. One categoryis by increasing the data lines to control the first pixel area and thesecond pixel area, respectively. The drawback is the increased number ofdrivers, resulting in increased costs. The other category is to designcapacitors on the array substrate for controlling the inconsistencyvoltage levels of the first pixel area and the second pixel area of thepotential inconsistencies, to achieve low color skew design. However,because the design of the array substrate capacitors will reduce theaperture ratio of the pixel structure, the display effect will be poor.

Thus, it is desired to provide a liquid crystal display panel, pixelstructure and driving method thereof to solve the above problems.

SUMMARY OF THE INVENTION

The technical issue to be addressed by the present invention is toprovide a liquid crystal display panel, pixel structure and drivingmethod thereof, which realizes low skew effect without reducing apertureratio of the pixel structure so as to avoid color distortion problem ata large viewing angle.

The present invention provides a pixel structure, which comprises: aplurality of pixel units arranged in a matrix form; each of the pixelunits further comprising: a first pixel area, a second pixel area and athird pixel area, adjacently disposed; the first pixel area furthercomprising: a first pixel electrode and a first control switch, and thefirst pixel electrode connected to a data signal through the firstcontrol switch; the second pixel area further comprising: a second pixelelectrode and a second control switch, and the second pixel electrodeconnected to a data signal through the second control switch; thecontrol terminal of the first control switch and the control terminal ofthe second control switch being both connected to a first scan signal;the third pixel area further comprising: a third pixel electrode and athird control switch, and the third pixel electrode connected to a datasignal sequentially through the third control switch and the secondcontrol switch; the control terminal of the third control switchconnected to a second scan signal; the third pixel electrode connectedto the second pixel electrode through the third control switch so as tomake the voltage level at the first pixel electrode different from thevoltage level at the second pixel electrode when the first controlswitch, the second control switch and the third control switch being allconductive.

According to a preferred embodiment of the present invention, the pixelstructure comprises an array substrate and a color filter substrate,disposed oppositely, and a liquid crystal layer sandwiched between thearray substrate and the color filter substrate; wherein the first pixelarea, the second pixel area and the third pixel area are disposed on thearray substrate; the color filter substrate is disposed with commonelectrode; a liquid crystal capacitive voltage divider is formed betweenthe third pixel electrode and the common electrode with the liquidcrystal layer as media; the liquid crystal capacitive voltage divider isfor lowering the voltage level at the second pixel electrode so that thevoltage level at the second pixel electrode is different from thevoltage level at the second pixel electrode when the first controlswitch, the second control switch and the third control switch are allconductive.

According to a preferred embodiment of the present invention, the arraysubstrate further comprises an insulation layer and a storage capacitorelectrode, disposed sequentially underneath the first pixel electrodeand the second pixel electrode; a first liquid crystal capacitor isformed between the first pixel electrode and the common electrode withthe liquid crystal layer as media; a first storage capacitor is formedbetween the first pixel electrode and the storage capacitor electrodewith the insulation layer as media; a second liquid crystal capacitor isformed between the second pixel electrode and the common electrode withthe liquid crystal layer as media; a second storage capacitor is formedbetween the second pixel electrode and the storage capacitor electrodewith the insulation layer as media; the common electrode is connected toa first common voltage and the storage capacitor electrode is connectedto a second common voltage.

According to a preferred embodiment of the present invention, the firstcontrol switch is a first thin-film transistor; the second controlswitch is a second thin-film transistor; the third control switch is athird thin-film transistor; the first pixel electrode is connected tothe drain of the first thin-film transistor; the source of the firstthin-film transistor is connected to the data signal; the gate of thefirst thin-film transistor is connected to the first scan signal; thesecond pixel electrode is connected to the drain of the second thin-filmtransistor the source of the second thin-film transistor is connected tothe data signal; the gate of the second thin-film transistor isconnected to the first scan signal; the third pixel electrode isconnected to the drain of the third thin-film transistor; the source ofthe third thin-film transistor is connected to drain of the secondthin-film transistor, and the gate of the third thin-film transistor isconnected to the second scan signal.

According to a preferred embodiment of the present invention, the arraysubstrate further comprises a plurality of scan lines disposedtransversely, and a plurality of data lines disposed longitudinally; thescan lines intersects with the data lines; the first pixel area of then-th pixel is disposed in the area surrounded by the n−1th scan line,n-th scan line, n-th data line and n+1th data line; the second pixelarea of the n-th pixel is disposed in the area surrounded by the n-thscan line, n+1th scan line, n-th data line and n+1th data line; thethird pixel area of the n-th pixel is disposed in the area surrounded bythe n+1th scan line, n+2th scan line, n-th data line and n+1th dataline; the n-th data line is to provide the data signal to the n-thpixel; the n-th scan line is to provide the first scan signal to then-th pixel; and the n+1th scan line is to provide the second scan signalto the n-th pixel.

According to a preferred embodiment of the present invention, the secondscan signal of the n-th pixel and the first scan signal of the n+1thpixel are the same signal.

The present invention provides a liquid crystal display panel, whichcomprises: a pixel structure, the pixel structure further comprising: aplurality of pixel units arranged in a matrix form; each of the pixelunits further comprising: a first pixel area, a second pixel area and athird pixel area, adjacently disposed; the first pixel area furthercomprising: a first pixel electrode and a first control switch, and thefirst pixel electrode connected to a data signal through the firstcontrol switch; the second pixel area further comprising: a second pixelelectrode and a second control switch, and the second pixel electrodeconnected to a data signal through the second control switch; thecontrol terminal of the first control switch and the control terminal ofthe second control switch being both connected to a first scan signal;the third pixel area further comprising: a third pixel electrode and athird control switch, and the third pixel electrode connected to a datasignal sequentially through the third control switch and the secondcontrol switch; the control terminal of the third control switchconnected to a second scan signal; the third pixel electrode connectedto the second pixel electrode through the third control switch so as tomake the voltage level at the first pixel electrode different from thevoltage level at the second pixel electrode when the first controlswitch, the second control switch and the third control switch being allconductive.

According to a preferred embodiment of the present invention, the pixelstructure comprises an array substrate and a color filter substrate,disposed oppositely, and a liquid crystal layer sandwiched between thearray substrate and the color filter substrate; wherein the first pixelarea, the second pixel area and the third pixel area are disposed on thearray substrate; the color filter substrate is disposed with commonelectrode; a liquid crystal capacitive voltage divider is formed betweenthe third pixel electrode and the common electrode with the liquidcrystal layer as media; the liquid crystal capacitive voltage divider isfor lowering the voltage level at the second pixel electrode so that thevoltage level at the second pixel electrode is different from thevoltage level at the second pixel electrode when the first controlswitch, the second control switch and the third control switch are allconductive.

According to a preferred embodiment of the present invention, the arraysubstrate further comprises an insulation layer and a storage capacitorelectrode, disposed sequentially underneath the first pixel electrodeand the second pixel electrode; a first liquid crystal capacitor isformed between the first pixel electrode and the common electrode withthe liquid crystal layer as media; a first storage capacitor is formedbetween the first pixel electrode and the storage capacitor electrodewith the insulation layer as media; a second liquid crystal capacitor isformed between the second pixel electrode and the common electrode withthe liquid crystal layer as media; a second storage capacitor is formedbetween the second pixel electrode and the storage capacitor electrodewith the insulation layer as media; the common electrode is connected toa first common voltage and the storage capacitor electrode is connectedto a second common voltage.

According to a preferred embodiment of the present invention, the firstcontrol switch is a first thin-film transistor; the second controlswitch is a second thin-film transistor; the third control switch is athird thin-film transistor; the first pixel electrode is connected tothe drain of the first thin-film transistor; the source of the firstthin-film transistor is connected to the data signal; the gate of thefirst thin-film transistor is connected to the first scan signal; thesecond pixel electrode is connected to the drain of the second thin-filmtransistor; the source of the second thin-film transistor is connectedto the data signal; the gate of the second thin-film transistor isconnected to the first scan signal; the third pixel electrode isconnected to the drain of the third thin-film transistor the source ofthe third thin-film transistor is connected to drain of the secondthin-film transistor; and the gate of the third thin-film transistor isconnected to the second scan signal.

According to a preferred embodiment of the present invention, the arraysubstrate further comprises a plurality of scan lines disposedtransversely, and a plurality of data lines disposed longitudinally; thescan lines intersects with the data lines; the first pixel area of then-th pixel is disposed in the area surrounded by the n−1th scan line,n-th scan line, n-th data line and n+1th data line; the second pixelarea of the n-th pixel is disposed in the area surrounded by the n-thscan line, n+1th scan line, n-th data line and n+1th data line; thethird pixel area of the n-th pixel is disposed in the area surrounded bythe n+1th scan line, n+2th scan line, n-th data line and n+1th dataline; the n-th data line is to provide the data signal to the n-thpixel; the n-th scan line is to provide the first scan signal to then-th pixel; and the n+1th scan line is to provide the second scan signalto the n-th pixel.

According to a preferred embodiment of the present invention, the secondscan signal of the n-th pixel and the first scan signal of the n+1thpixel are the same signal.

The present invention provides a driving method of liquid crystaldisplay panel, the liquid crystal display panel, which comprises: apixel structure, the pixel structure further comprising: a plurality ofpixel units arranged in a matrix form; each of the pixel units furthercomprising: a first pixel area, a second pixel area and a third pixelarea, adjacently disposed; the first pixel area further comprising: afirst pixel electrode and a first control switch, and the first pixelelectrode connected to a data signal through the first control switch;the second pixel area further comprising: a second pixel electrode and asecond control switch, and the second pixel electrode connected to adata signal through the second control switch; the control terminal ofthe first control switch and the control terminal of the second controlswitch being both connected to a first scan signal; the third pixel areafurther comprising: a third pixel electrode and a third control switch,and the third pixel electrode connected to a data signal sequentiallythrough the third control switch and the second control switch; thethird pixel electrode connected to the second pixel electrode throughthe third control switch; the control terminal of the third controlswitch connected to a second scan signal; the driving method of theliquid crystal display panel comprises: using the first scan signal tocontrol the first control switch and the second control switch to becomeconductive; using the data signal to charge the first pixel area and thesecond pixel area so that the first pixel electrode and the second pixelelectrode forming a first equivoltage level V1; using the second scansignal to control the second control switch and the third control switchto become conductive so that the third pixel electrode and the secondpixel electrode are conductive to make the second pixel electrode andthe third pixel electrode forming a second equivoltage level V2different from the first equivoltage level V1.

According to a preferred embodiment of the present invention, the pixelstructure comprises an array substrate and a color filter substrate,disposed oppositely, and a liquid crystal layer sandwiched between thearray substrate and the color filter substrate; the array substratefurther comprises an insulation layer and a storage capacitor electrode,disposed sequentially underneath the first pixel electrode and thesecond pixel electrode; wherein the color filter substrate is disposedwith common electrode; the first pixel area, the second pixel area andthe third pixel area are disposed on the array substrate; a liquidcrystal capacitive voltage divider CL is formed between the third pixelelectrode and the common electrode with the liquid crystal layer asmedia; a first liquid crystal capacitor CL1 is formed between the firstpixel electrode and the common electrode with the liquid crystal layeras media; a first storage capacitor Cs1 is formed between the firstpixel electrode and the storage capacitor electrode with the insulationlayer as media; a second liquid crystal capacitor CL2 is formed betweenthe second pixel electrode and the common electrode with the liquidcrystal layer as media; a second storage capacitor Cs2 is formed betweenthe second pixel electrode and the storage capacitor electrode with theinsulation layer as media; the first equivoltage level V1 and the secondequivoltage level V2 ahs the relation: V2=V1 (CL2+Cs2)/(CL2+Cs2+2CL).

According to a preferred embodiment of the present invention, the commonelectrode is connected to a first common voltage and the storagecapacitor electrode is connected to a second common voltage.

The efficacy of the present invention is that to be distinguished fromthe state of the art. Through the deposition of the third pixel area,the present invention utilizes the liquid crystal capacitive voltagedivider formed between the third pixel electrode and the commonelectrode to lower the voltage level of the second pixel area so thatthe first pixel area and the second pixel area have different voltagelevels. As such, the present invention realizes low skew effect withoutreducing aperture ratio of the pixel structure so as to avoid colordistortion problem at a large viewing angle.

BRIEF DESCRIPTION OF THE DRAWINGS

To make the technical solution of the embodiments according to thepresent invention, a brief description of the drawings that arenecessary for the illustration of the embodiments will be given asfollows. Apparently, the drawings described below show only exampleembodiments of the present invention and for those having ordinaryskills in the art, other drawings may be easily obtained from thesedrawings without paying any creative effort. In the drawings:

FIG. 1 is a cross-sectional view showing the structure of the pixel of apreferred embodiment according to the present invention;

FIG. 2 is a schematic view showing the circuit structure of the pixelstructure according to the present invention;

FIG. 3 is a schematic view showing the structure of the liquid crystaldisplay panel according to the present invention; and

FIG. 4 is flowchart showing the driving method of the liquid crystaldisplay panel according to the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The following refers to drawings and embodiments to describe the presentinvention in details.

Referring to FIG. 1, FIG. 1 is a cross-sectional view showing thestructure of the pixel of a preferred embodiment according to thepresent invention. In the instant embodiment, a pixel structure 10preferably comprises: an array substrate 11, a liquid crystal layer 12and a color filter substrate 13; wherein the array substrate 11 and thecolor filter substrate 13 are disposed oppositely and the liquid crystallayer 12 is sandwiched between the array substrate 11 and the colorfilter substrate 13.

The pixel structure 10 of the present invention comprises a plurality ofpixel units 14 a, 14 b, 14 c, 14 d, having the same structure fordisplaying different colors; wherein each of the pixel units furthercomprising: a first pixel area 141, a second pixel area 142 and a thirdpixel area 143, adjacently disposed.

The first pixel area 141, the second pixel area 142 and the third pixelarea 143 are disposed on the array substrate 11. The array substratefurther 1 comprises a storage capacitor electrode 15 and an insulationlayer 16, wherein the storage capacitor electrode 15 is disposedunderneath the first pixel electrode 141 and the second pixel electrode142; and the insulation layer 16 covers the storage capacitor electrode15.

The color filter substrate 13 is disposed with common electrode 17,disposed at the under surface of the color filter substrate 13.

Referring to FIG. 1 and FIG. 2 simultaneously, FIG. 2 is a schematicview showing the circuit structure of the pixel structure according tothe present invention. In the instant embodiment, the array substrate 11is disposed with a plurality of scan lines S₁-S_(N) and a plurality ofdata line D₁-D_(N). The plurality of scan lines S₁-S_(N) is disposedtransversely, and the plurality of data lines D₁-D_(N) is disposedlongitudinally. The scan lines and the data lines intersect with eachother perpendicularly. In other embodiments, the scan lines and the datalines are not necessarily perpendicular to each other.

The following uses the n-th pixel 14 c of FIG. 1 as an exemplar forexplanation.

The n-th pixel 14 c comprises the first pixel area 141, the second pixelarea 142 and the third pixel area 143. The first pixel area 141 of then-th pixel 14 c is disposed in the area surrounded by the n−1th scanline S_(n−1), n-th scan line S_(n), n-th data line D_(n) and n+1th dataline D_(n+1). The second pixel area 142 of the n-th pixel 14 c isdisposed in the area surrounded by the n-th scan line S_(n), n+1th scanline S_(n+1), n-th data line D_(n) and n+1th data line D_(n+1). Thethird pixel area 143 of the n-th pixel 14 c is disposed in the areasurrounded by the n+1th scan line S_(n+1), n+2th scan line S_(n+2), n-thdata line D_(n) and n+1th data line D_(n+1).

The first pixel area 141 further comprises: a first pixel electrode 21and a first control switch T1, and the first pixel electrode 21 isconnected to a data signal through the first control switch T1. In theinstant embodiment, the first control switch T1 is preferably a firstthin-film transistor T1. The first pixel electrode 21 is connected tothe drain of the first thin-film transistor T1; the source of the firstthin-film transistor T1 is connected to the data signal; the gate of thefirst thin-film transistor T1 is the control terminal and is connectedto the first scan signal. The n-th data line D_(n) is to provide thedata signal to the n-th pixel 14 c; and in other words, the source ofthe first thin-film transistor T1 is connected to the n-th data lineD_(n). The n-th scan line S_(n) is to provide the first scan signal tothe n-th pixel 14 c; and in other words, the gate of the first thin-filmtransistor T1 is connected to the n-th scan line S_(n).

The second pixel area 142 further comprises: a second pixel electrode 22and a second control switch T2, and the second pixel electrode 22 isconnected to a data signal through the second control switch T2. In theinstant embodiment, the second control switch T2 is preferably a secondthin-film transistor T2. The second pixel electrode 21 is connected tothe drain of the second thin-film transistor T2; the source of thesecond thin-film transistor T2 is connected to the data signal; the gateof the second thin-film transistor T2 is the control terminal and isconnected to the first scan signal. The n-th data line D_(n) is toprovide the data signal to the n-th pixel 14 c; and in other words, thesource of the second thin-film transistor T2 is connected to the n-thdata line D_(n). The n-th scan line S_(n) is to provide the first scansignal to the n-th pixel 14 c; and in other words, the gate of thesecond thin-film transistor T1 is connected to the n-th scan line S_(n).

The third pixel area 143 further comprises: a third pixel electrode 23and a third control switch T3, and the third pixel electrode 23 isconnected to a data signal sequentially through the third control switchT3 and the second control switch T2. The third pixel electrode 23 isfurther connected to the second pixel electrode 22 through the thirdcontrol switch T3. In the instant embodiment, the third control switchT3 is preferably a third thin-film transistor T3. The third pixelelectrode 23 is connected to the drain of the third thin-film transistorT3; the source of the third thin-film transistor T3 is connected todrain of the second thin-film transistor T2; and the gate of the thirdthin-film transistor T3 is the control terminal and is connected to thesecond scan signal. The n+1th scan line S_(n+1) is to provide the secondscan signal to the n-th pixel 14 c. In other words, the gate of thethird thin-film transistor T3 is connected to the n+1th scan lineS_(n+1).

It should be noted that in the instant embodiment, the second scansignal of the n-th pixel 14 c and the first scan signal of the n+1thpixel 14 d are preferably the same signal. In other words, the n+1thscan line S_(n+1) and n+2th scan line S_(n+2) are connected to the samescan line terminal of a driving IC for generating scan signal so as tosave cost. In other embodiments, the second scan signal of the n-thpixel 14 c and the first scan signal of the n+1th pixel 14 d are notnecessarily the same signal. In other words, the n+1th scan line S_(n+1)and n+2th scan line S_(n+2) are not connected to the same driving IC.Yet in other embodiments, the second scan signal of the n-th pixel 14 cand the first scan signal of the n+1th pixel 14 d can both be providedby the n+1th scan line S_(n+1).

The common electrode 17 is connected to the first common voltage VC1,and the storage capacitor electrode 15 is connected to the second commonvoltage VC2. A liquid crystal capacitive voltage divider CL is formedbetween the third pixel electrode 23 and the common electrode 17 withthe liquid crystal layer 12 as media. A first liquid crystal capacitorCL1 is formed between the first pixel electrode 21 and the commonelectrode 17 with the liquid crystal layer 12 as media; a first storagecapacitor Cs1 is formed between the first pixel electrode 21 and thestorage capacitor electrode 15 with the insulation layer 16 as media; asecond liquid crystal capacitor CL2 is formed between the second pixelelectrode 22 and the common electrode 17 with the liquid crystal layer12 as media; and a second storage capacitor Cs2 is formed between thesecond pixel electrode 22 and the storage capacitor electrode 15 withthe insulation layer 16 as media. The liquid crystal capacitive voltagedivider CL is for lowering the voltage level at the second pixelelectrode 22 so that the voltage level at the second pixel electrode 22is different from the voltage level at the first pixel electrode 21 whenthe first thin-film transistor T1, the second thin-film transistor T2and the third thin-film transistor T3 are all conductive. The firstthin-film transistor T1 being conductive means that the source and thedrain are conductive. Similarly, the second thin-film transistor T2 andthe third thin-film transistor T3 being conductive means that therespective source and the drain of the second thin-film transistor T2and the third thin-film transistor T3 are conductive.

The following refers to drawings and embodiments to describe theoperation of the pixel structure of the present invention.

As shown in FIG. 2, the n-th pixel 14 c is used for explanation. Whenthe first scan signal on the n-th scan line S_(n) controls the firstthin-film transistor T1 and the second thin-film transistor T2 to becomeconductive, and the second scan signal on the n+1 scan line S_(n+1)controls the third thin-film transistor T3 to become cut-off, the firstpixel electrode 21 and the second pixel electrode 22 form a firstequivoltage level V1 (V1 in FIG. 2). Then, when the second scan signalcontrols the third thin-film transistor to become conductive, the liquidcrystal capacitive voltage divider CL accumulates charges to share apartial voltage for the second pixel electrode 22 so that the voltagelevel at the first pixel electrode 21 is different from the voltagelevel at the second pixel electrode 22 to achieve the conventional lowskew design in the pixel structure.

Specifically, in the instant embodiment, at this point, the second pixelelectrode 22 and the third pixel electrode 23 form a second equivoltagelevel V1 (V2 in FIG. 2). The relation between the first equivoltagelevel V1 and the second equivoltage level V2 can be obtained from thecapacitive voltage division equation:

V2=V1(CL2+Cs2)/(Cl2+Cs2+2CL)  (1)

As shown in (1), V2<V1; in other words, the voltage level at the firstpixel electrode 21 is different from the voltage level at the secondpixel electrode 22, and the conventional low skew design requirement inthe pixel structure is achieved. As such, when the voltage level at thefirst pixel electrode 21 is different from the voltage level at thesecond pixel electrode 22, the color distortion at large viewing anglefor the liquid crystal display panel will be reduced. The instantembodiment does not dispose capacitor on the array substrate; andtherefore, the aperture ratio of the liquid crystal display panel is notaffected.

Referring to FIG. 3, FIG. 3 is a schematic view showing the structure ofthe liquid crystal display panel according to the present invention. Inthe instant embodiment, the liquid crystal display panel comprises: apixel structure 10, a first polarizer 18 and the second polarizer 19;wherein the pixel structure 10 can be the pixel structure 10 of anyprevious embodiment. The first polarizer 18 is disposed underneath thearray substrate 11, and the second polarizer 19 is disposed above thecolor filter substrate 13.

FIG. 4 is flowchart showing the driving method of the liquid crystaldisplay panel according to the present invention.

Step S41: using the first scan signal to control the first controlswitch and the second control switch to become conductive.

Step S42: using the data signal to charge the first pixel area and thesecond pixel area so that the first pixel electrode and the second pixelelectrode forming a first equivoltage level V1.

Step S43: using the second scan signal to control the second controlswitch and the third control switch to become conductive so that thethird pixel electrode and the second pixel electrode are conductive tomake the second pixel electrode and the third pixel electrode forming asecond equivoltage level V2 different from the first equivoltage levelV1.

Compared to known technique, through the deposition of the third pixelarea, the present invention utilizes the liquid crystal capacitivevoltage divider formed between the third pixel electrode and the commonelectrode to lower the voltage level of the second pixel area so thatthe first pixel area and the second pixel area have different voltagelevels. As such, the present invention realizes low skew effect withoutreducing aperture ratio of the pixel structure so as to avoid colordistortion problem at a large viewing angle.

Embodiments of the present invention have been described, but notintending to impose any unduly constraint to the appended claims. Anymodification of equivalent structure or equivalent process madeaccording to the disclosure and drawings of the present invention, orany application thereof, directly or indirectly, to other related fieldsof technique, is considered encompassed in the scope of protectiondefined by the claims of the present invention.

What is claimed is:
 1. A pixel structure, which comprises: a pluralityof pixel units arranged in a matrix form; each of the pixel unitsfurther comprising: a first pixel area, a second pixel area and a thirdpixel area, adjacently disposed; wherein: the first pixel area furthercomprising: a first pixel electrode and a first control switch, and thefirst pixel electrode connected to a data signal through the firstcontrol switch; the second pixel area further comprising: a second pixelelectrode and a second control switch, and the second pixel electrodeconnected to a data signal through the second control switch; thecontrol terminal of the first control switch and the control terminal ofthe second control switch being both connected to a first scan signal;the third pixel area further comprising: a third pixel electrode and athird control switch, and the third pixel electrode connected to a datasignal sequentially through the third control switch and the secondcontrol switch; the control terminal of the third control switchconnected to a second scan signal; the third pixel electrode connectedto the second pixel electrode through the third control switch so as tomake the voltage level at the first pixel electrode different from thevoltage level at the second pixel electrode when the first controlswitch, the second control switch and the third control switch being allconductive.
 2. The pixel structure as claimed in claim 1, wherein thepixel structure comprises an array substrate and a color filtersubstrate, disposed oppositely, and a liquid crystal layer sandwichedbetween the array substrate and the color filter substrate; wherein thefirst pixel area, the second pixel area and the third pixel area aredisposed on the array substrate; the color filter substrate is disposedwith common electrode; a liquid crystal capacitive voltage divider isformed between the third pixel electrode and the common electrode withthe liquid crystal layer as media; the liquid crystal capacitive voltagedivider is for lowering the voltage level at the second pixel electrodeso that the voltage level at the second pixel electrode is differentfrom the voltage level at the second pixel electrode when the firstcontrol switch, the second control switch and the third control switchare all conductive.
 3. The pixel structure as claimed in claim 2,wherein the array substrate further comprises an insulation layer and astorage capacitor electrode, disposed sequentially underneath the firstpixel electrode and the second pixel electrode; wherein: a first liquidcrystal capacitor is formed between the first pixel electrode and thecommon electrode with the liquid crystal layer as media; a first storagecapacitor is formed between the first pixel electrode and the storagecapacitor electrode with the insulation layer as media; a second liquidcrystal capacitor is formed between the second pixel electrode and thecommon electrode with the liquid crystal layer as media; a secondstorage capacitor is formed between the second pixel electrode and thestorage capacitor electrode with the insulation layer as media; thecommon electrode is connected to a first common voltage and the storagecapacitor electrode is connected to a second common voltage.
 4. Thepixel structure as claimed in claim 1, wherein the first control switchis a first thin-film transistor; the second control switch is a secondthin-film transistor; the third control switch is a third thin-filmtransistor; the first pixel electrode is connected to the drain of thefirst thin-film transistor; the source of the first thin-film transistoris connected to the data signal; the gate of the first thin-filmtransistor is connected to the first scan signal; the second pixelelectrode is connected to the drain of the second thin-film transistorthe source of the second thin-film transistor is connected to the datasignal; the gate of the second thin-film transistor is connected to thefirst scan signal; the third pixel electrode is connected to the drainof the third thin-film transistor; the source of the third thin-filmtransistor is connected to drain of the second thin-film transistor, andthe gate of the third thin-film transistor is connected to the secondscan signal.
 5. The pixel structure as claimed in claim 2, wherein thearray substrate further comprises a plurality of scan lines disposedtransversely, and a plurality of data lines disposed longitudinally; thescan lines intersects with the data lines; wherein: the first pixel areaof the n-th pixel is disposed in the area surrounded by the n−1th scanline, n-th scan line, n-th data line and n+1th data line; the secondpixel area of the n-th pixel is disposed in the area surrounded by then-th scan line, n+1th scan line, n-th data line and n+1th data line; thethird pixel area of the n-th pixel is disposed in the area surrounded bythe n+1th scan line, n+2th scan line, n-th data line and n+1th dataline; the n-th data line is to provide the data signal to the n-thpixel; the n-th scan line is to provide the first scan signal to then-th pixel; and the n+1th scan line is to provide the second scan signalto the n-th pixel.
 6. The pixel structure as claimed in claim 5, whereinthe second scan signal of the n-th pixel and the first scan signal ofthe n+1th pixel are the same signal.
 7. A liquid crystal display panel,which comprises: a pixel structure, the pixel structure furthercomprising: a plurality of pixel units arranged in a matrix form; eachof the pixel units further comprising: a first pixel area, a secondpixel area and a third pixel area, adjacently disposed; wherein: thefirst pixel area further comprising: a first pixel electrode and a firstcontrol switch, and the first pixel electrode connected to a data signalthrough the first control switch; the second pixel area furthercomprising: a second pixel electrode and a second control switch, andthe second pixel electrode connected to a data signal through the secondcontrol switch; the control terminal of the first control switch and thecontrol terminal of the second control switch being both connected to afirst scan signal; the third pixel area further comprising: a thirdpixel electrode and a third control switch, and the third pixelelectrode connected to a data signal sequentially through the thirdcontrol switch and the second control switch; the control terminal ofthe third control switch connected to a second scan signal; the thirdpixel electrode connected to the second pixel electrode through thethird control switch so as to make the voltage level at the first pixelelectrode different from the voltage level at the second pixel electrodewhen the first control switch, the second control switch and the thirdcontrol switch being all conductive.
 8. The liquid crystal display panelas claimed in claim 7, wherein the pixel structure comprises an arraysubstrate and a color filter substrate, disposed oppositely, and aliquid crystal layer sandwiched between the array substrate and thecolor filter substrate; wherein the first pixel area, the second pixelarea and the third pixel area are disposed on the array substrate; thecolor filter substrate is disposed with common electrode; a liquidcrystal capacitive voltage divider is formed between the third pixelelectrode and the common electrode with the liquid crystal layer asmedia; the liquid crystal capacitive voltage divider is for lowering thevoltage level at the second pixel electrode so that the voltage level atthe second pixel electrode is different from the voltage level at thesecond pixel electrode when the first control switch, the second controlswitch and the third control switch are all conductive.
 9. The liquidcrystal display panel as claimed in claim 8, wherein the array substratefurther comprises an insulation layer and a storage capacitor electrode,disposed sequentially underneath the first pixel electrode and thesecond pixel electrode; wherein: a first liquid crystal capacitor isformed between the first pixel electrode and the common electrode withthe liquid crystal layer as media; a first storage capacitor is formedbetween the first pixel electrode and the storage capacitor electrodewith the insulation layer as media; a second liquid crystal capacitor isformed between the second pixel electrode and the common electrode withthe liquid crystal layer as media; a second storage capacitor is formedbetween the second pixel electrode and the storage capacitor electrodewith the insulation layer as media; the common electrode is connected toa first common voltage and the storage capacitor electrode is connectedto a second common voltage.
 10. The liquid crystal display panel asclaimed in claim 7, wherein the first control switch is a firstthin-film transistor; the second control switch is a second thin-filmtransistor; the third control switch is a third thin-film transistor thefirst pixel electrode is connected to the drain of the first thin-filmtransistor; the source of the first thin-film transistor is connected tothe data signal; the gate of the first thin-film transistor is connectedto the first scan signal; the second pixel electrode is connected to thedrain of the second thin-film transistor; the source of the secondthin-film transistor is connected to the data signal; the gate of thesecond thin-film transistor is connected to the first scan signal; thethird pixel electrode is connected to the drain of the third thin-filmtransistor; the source of the third thin-film transistor is connected todrain of the second thin-film transistor; and the gate of the thirdthin-film transistor is connected to the second scan signal.
 11. Theliquid crystal display panel as claimed in claim 8, wherein the arraysubstrate further comprises a plurality of scan lines disposedtransversely, and a plurality of data lines disposed longitudinally; thescan lines intersects with the data lines; wherein: the first pixel areaof the n-th pixel is disposed in the area surrounded by the n−1th scanline, n-th scan line, n-th data line and n+1th data line; the secondpixel area of the n-th pixel is disposed in the area surrounded by then-th scan line, n+1th scan line, n-th data line and n+1th data line; thethird pixel area of the n-th pixel is disposed in the area surrounded bythe n+1th scan line, n+2th scan line, n-th data line and n+1th dataline; the n-th data line is to provide the data signal to the n-thpixel; the n-th scan line is to provide the first scan signal to then-th pixel; and the n+1th scan line is to provide the second scan signalto the n-th pixel.
 12. The liquid crystal display panel as claimed inclaim 11, wherein the second scan signal of the n-th pixel and the firstscan signal of the n+1th pixel are the same signal.
 13. A driving methodof liquid crystal display panel, the liquid crystal display panel, whichcomprises: a pixel structure, the pixel structure further comprising: aplurality of pixel units arranged in a matrix form; each of the pixelunits further comprising: a first pixel area, a second pixel area and athird pixel area, adjacently disposed; the first pixel area furthercomprising: a first pixel electrode and a first control switch, and thefirst pixel electrode connected to a data signal through the firstcontrol switch; the second pixel area further comprising: a second pixelelectrode and a second control switch, and the second pixel electrodeconnected to a data signal through the second control switch; thecontrol terminal of the first control switch and the control terminal ofthe second control switch being both connected to a first scan signal;the third pixel area further comprising: a third pixel electrode and athird control switch, and the third pixel electrode connected to a datasignal sequentially through the third control switch and the secondcontrol switch; the third pixel electrode connected to the second pixelelectrode through the third control switch; the control terminal of thethird control switch connected to a second scan signal; the drivingmethod of the liquid crystal display panel comprises: using the firstscan signal to control the first control switch and the second controlswitch to become conductive; using the data signal to charge the firstpixel area and the second pixel area so that the first pixel electrodeand the second pixel electrode forming a first equivoltage level V1; andusing the second scan signal to control the second control switch andthe third control switch to become conductive so that the third pixelelectrode and the second pixel electrode are conductive to make thesecond pixel electrode and the third pixel electrode forming a secondequivoltage level V2 different from the first equivoltage level V1. 14.The driving method of liquid crystal display panel as claimed in claim13, wherein the pixel structure comprises an array substrate and a colorfilter substrate, disposed oppositely, and a liquid crystal layersandwiched between the array substrate and the color filter substrate;the array substrate further comprises an insulation layer and a storagecapacitor electrode, disposed sequentially underneath the first pixelelectrode and the second pixel electrode; wherein the color filtersubstrate is disposed with common electrode; the first pixel area, thesecond pixel area and the third pixel area are disposed on the arraysubstrate; a liquid crystal capacitive voltage divider CL is formedbetween the third pixel electrode and the common electrode with theliquid crystal layer as media; a first liquid crystal capacitor CL1 isformed between the first pixel electrode and the common electrode withthe liquid crystal layer as media; a first storage capacitor Cs1 isformed between the first pixel electrode and the storage capacitorelectrode with the insulation layer as media; a second liquid crystalcapacitor CL2 is formed between the second pixel electrode and thecommon electrode with the liquid crystal layer as media; a secondstorage capacitor Cs2 is formed between the second pixel electrode andthe storage capacitor electrode with the insulation layer as media; thefirst equivoltage level V1 and the second equivoltage level V2 ahs therelation:V2=V1(CL2+Cs2)/(CL2+Cs2+2CL).
 15. The driving method of liquid crystaldisplay panel as claimed in claim 13, wherein the common electrode isconnected to a first common voltage and the storage capacitor electrodeis connected to a second common voltage.